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%0 Conference Paper
%1 conf/essderc/HorstGHFHLZIK16
%A Horst, Fabian
%A Graef, Michael
%A Hosenfeld, Fabian
%A Farokhnejad, Atieh
%A Hain, Franziska
%A Luong, Gia Vinh
%A Zhao, Qing-Tai
%A Iñíguez, Benjamín
%A Kloes, Alexander
%B ESSDERC
%D 2016
%I IEEE
%K dblp
%P 456-459
%T Implementation of a DC compact model for double-gate Tunnel-FET based on 2D calculations and application in circuit simulation.
%U http://dblp.uni-trier.de/db/conf/essderc/essderc2016.html#HorstGHFHLZIK16
%@ 978-1-5090-2969-3
@inproceedings{conf/essderc/HorstGHFHLZIK16,
added-at = {2018-11-02T00:00:00.000+0100},
author = {Horst, Fabian and Graef, Michael and Hosenfeld, Fabian and Farokhnejad, Atieh and Hain, Franziska and Luong, Gia Vinh and Zhao, Qing-Tai and Iñíguez, Benjamín and Kloes, Alexander},
biburl = {https://www.bibsonomy.org/bibtex/285af5e75d678b6459c1770a37260cfa3/dblp},
booktitle = {ESSDERC},
crossref = {conf/essderc/2016},
ee = {https://doi.org/10.1109/ESSDERC.2016.7599684},
interhash = {ffd3b2191c3627c46f580cc375f55a06},
intrahash = {85af5e75d678b6459c1770a37260cfa3},
isbn = {978-1-5090-2969-3},
keywords = {dblp},
pages = {456-459},
publisher = {IEEE},
timestamp = {2019-10-17T12:40:04.000+0200},
title = {Implementation of a DC compact model for double-gate Tunnel-FET based on 2D calculations and application in circuit simulation.},
url = {http://dblp.uni-trier.de/db/conf/essderc/essderc2016.html#HorstGHFHLZIK16},
year = 2016
}
