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Towards a Multi-array Architecture for Accelerating Large-scale Matrix Multiplication on FPGAs.

, , , , and . ISCAS, page 1-5. IEEE, (2018)

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Towards a Multi-array Architecture for Accelerating Large-scale Matrix Multiplication on FPGAs., , , , and . ISCAS, page 1-5. IEEE, (2018)MZ Core: An Enhanced Matrix Acceleration Engine for HPC/ AI Applications., , , , , , , , , and 1 other author(s). HPCC/DSS/SmartCity/DependSys, page 126-134. IEEE, (2022)Unified Virtual Memory Support for Deep CNN Accelerator on SoC FPGA., , , , and . ICA3PP (1), volume 9528 of Lecture Notes in Computer Science, page 64-76. Springer, (2015)Scale-out Acceleration for 3D CNN-based Lung Nodule Segmentation on a Multi-FPGA System., , , , and . DAC, page 207. ACM, (2019)Towards a Uniform Architecture for the Efficient Implementation of 2D and 3D Deconvolutional Neural Networks on FPGAs., , , and . ISCAS, page 1-5. IEEE, (2019)Towards a Deep-Pipelined Architecture for Accelerating Deep GCN on a Multi-FPGA Platform., , , , and . ICA3PP (1), volume 12452 of Lecture Notes in Computer Science, page 528-547. Springer, (2020)Scalable FPGA-based Architecture for High-Performance Per-Flow Traffic Measurement., , , , and . FPGA, page 315. ACM, (2020)S-SIM: A Simulator for Systolic Array-based DNN Accelerators with Tile Access Awareness., , , , , and . ISCAS, page 2720-2724. IEEE, (2022)Toward an Efficient Deep Pipelined Template-Based Architecture for Accelerating the Entire 2-D and 3-D CNNs on FPGA., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 39 (7): 1442-1455 (2020)BP-Im2col: Implicit Im2col Supporting AI Backpropagation on Systolic Arrays., , , , , , , and . ICCD, page 415-418. IEEE, (2022)