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Disambiguation of "Bhattacharyya, Shuvra S."

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Hardware design methodology using lightweight dataflow and its integration with low power techniques.

, , , , , , , , , and . J. Syst. Archit., (2017)

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Somnath Bhattacharyya

Abinaschchandra Bhattacharyya

Arnab Bhattacharyya

Rameswar Bhattacharyya

Jyotirmay Bhattacharyya

 

Other publications of authors with the same name

Communication strategies for shared-bus embedded multiprocessors., and . EMSOFT, page 21-24. ACM, (2005)Guest Editorial., , and . VLSI Signal Processing, 40 (1): 5-6 (2005)Toward Efficient Many-core Scheduling of Partial Expansion Graphs., , , and . SCOPES, page 100-103. ACM, (2018)Model-Based Representations for Dataflow Schedules., and . Principles of Modeling, volume 10760 of Lecture Notes in Computer Science, page 88-105. Springer, (2018)Partial expansion of dataflow graphs for resource-aware scheduling of multicore signal processing systems., , , and . ACSSC, page 385-392. IEEE, (2014)Constant-rate clock recovery and jitter measurement on deep memory waveforms using dataflow., , and . I2MTC, page 1590-1595. IEEE, (2015)Prinet: A Prior Driven Spectral Super-Resolution Network., , , and . ICME, page 1-6. IEEE, (2020)Elastic Neural Networks: A Scalable Framework for Embedded Computer Vision., , , and . EUSIPCO, page 1472-1476. IEEE, (2018)Passive-Active Flowgraphs for Efficient Modeling and Design of Signal Processing Systems., , , , and . J. Signal Process. Syst., 92 (10): 1133-1151 (2020)Efficient Model Solving for Markov Decision Processes., , and . ISCC, page 1-5. IEEE, (2020)