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Disambiguation of "Stechele, Walter"

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Workshop Ädaptive and Organic Systems".

, , , and . GI Jahrestagung (2), volume P-134 of LNI, page 731-732. GI, (2008)

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Walter Stechele

Walter Stechele

Walter Stechele

Max Stechele

Max Stechele

 

Other publications of authors with the same name

Design of fine-grained sequential approximate circuits using probability-aware fault emulation., and . ISLPED, page 73-78. IEEE, (2015)Towards low-cost fault detection strategy of FPGA configuration memory in real-time systems., , and . IOLTS, page 81-86. IEEE, (2014)Towards Rapid Dynamic Partial Reconfiguration in Video-Based Driver Assistance Systems., , , and . ARC, volume 5992 of Lecture Notes in Computer Science, page 55-67. Springer, (2010)Efficient DVB-T2 decoding accelerator design by time-multiplexing FPGA resources., , , and . FPL, page 75-82. IEEE, (2012)HW-Flow: A Multi-Abstraction Level HW-CNN Codesign Pruning Methodology., , , , , , , , , and . Leibniz Trans. Embed. Syst., 8 (1): 03:1-03:30 (2022)Self-reconfigurable control architecture for complex mobile robots., , and . it Inf. Technol., 57 (2): 122-129 (2015)Binary-LoRAX: Low-Latency Runtime Adaptable XNOR Classifier for Semi-Autonomous Grasping with Prosthetic Hands., , , , , , , , , and 2 other author(s). ICRA, page 13430-13437. IEEE, (2021)Exploiting Metal Layer Characteristics for Low-Power Routing., , and . PATMOS, volume 2451 of Lecture Notes in Computer Science, page 55-64. Springer, (2002)Pruning CNNs for LiDAR-based Perception in Resource Constrained Environments., , , , , , , , and . IV Workshops, page 228-235. IEEE, (2021)Impact of technology evolution on dual supply voltage scaling and gate resizing in power-driven logic synthesis., , , and . ICECS, page 697-700. IEEE, (2002)