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High level analysis of trade-offs across different partitioning schemes for wireless applications.

, , , , , , and . SiPS, page 156-162. IEEE, (2011)

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Instruction Transfer And Storage Exploration for Low Energy VLIWs., , , , and . SiPS, page 292-297. IEEE, (2006)Instruction Buffering Exploration for Low Energy Embedded Processors., , , , , , and . PATMOS, volume 2799 of Lecture Notes in Computer Science, page 409-419. Springer, (2003)Low Power Coarse-Grained Reconfigurable Instruction Set Processor., , , , , and . FPL, volume 2778 of Lecture Notes in Computer Science, page 230-239. Springer, (2003)Power Estimation at Different Abstraction Levels for Wireless Baseband Processors., , , , and . J. Low Power Electron., 8 (5): 726-738 (2012)Hard versus Soft Software Defined Radio., , , and . VLSI Design, page 276-281. IEEE Computer Society, (2014)A backtracking instruction scheduler using predicate-based code hoisting to fill delay slots., , and . CASES, page 229-237. ACM, (2007)Placement-and-routing-based register allocation for coarse-grained reconfigurable arrays., , , and . LCTES, page 151-160. ACM, (2008)Hands-on tutorial: coarse-grained reconfigurable architectures - compilation and exploration., and . CODES+ISSS, page 575-576. ACM, (2012)Clustered Loop Buffer Organization for Low Energy VLIW Embedded Processors., , , , , and . IEEE Trans. Computers, 54 (6): 672-683 (2005)Instruction buffering exploration for low energy VLIWs with instruction clusters., , , , , , and . ASP-DAC, page 824-829. IEEE Computer Society, (2004)