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Disambiguation of "Loo, Roger"

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Progress in the physical modeling of carrier illumination

, , , , , and . Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures, 24 (3): 1131--1138 (2006)
DOI: 10.1116/1.2190654

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Rogér Loo

Gustav Loo

Gottfried Loo

Dirk Loo

Alfred Loo

 

Other publications of authors with the same name

Progress in the physical modeling of carrier illumination, , , , , and . Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures, 24 (3): 1131--1138 (2006)Comprehensive 300 mm process for Silicon spin qubits with modular integration., , , , , , , , , and 8 other author(s). VLSI Technology and Circuits, page 1-2. IEEE, (2023)Scalability comparison between raised- and embedded-SiGe source/drain structures for Si0.55Ge0.45 implant free quantum well pFET., , , , , , , and . Microelectron. Reliab., (2018)Nanosheet-based Complementary Field-Effect Transistors (CFETs) at 48nm Gate Pitch, and Middle Dielectric Isolation to enable CFET Inner Spacer Formation and Multi-Vt Patterning., , , , , , , , , and 30 other author(s). VLSI Technology and Circuits, page 1-2. IEEE, (2023)Scaled FinFETs Connected by Using Both Wafer Sides for Routing via Buried Power Rails., , , , , , , , , and 34 other author(s). VLSI Technology and Circuits, page 284-285. IEEE, (2022)NPN Si/SiGe memory selector with non-linearity>105 and ON-current>6MA/cm2., , , , , , , , , and 2 other author(s). ESSDERC, page 164-167. IEEE, (2023)Demonstration of 3D sequential FD-SOI on CMOS FinFET stacking featuring low temperature Si layer transfer and top tier device fabrication with tier interconnections., , , , , , , , , and 15 other author(s). VLSI Technology and Circuits, page 330-331. IEEE, (2022)60Gb/s waveguide-coupled O-band GeSi quantum-confined Stark effect electro-absorption modulator., , , , , , , and . OFC, page 1-3. IEEE, (2021)