Author of the publication

s ADC, and DPLL in 32nm SoC CMOS.

Y. Tan, J. Duster, C. Fu, E. Alpman, A. Balankutty, C. Lee, A. Ravi, S. Pellerano, K. Chandrashekar, H. Kim, B. Carlton, S. Suzuki, M. Shafi, Y. Palaskas, and H. Lakdawala. VLSIC, page 76-77. IEEE, (2012)

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Fabrizio Queirolo Pellerano

Stefano Meini

Stefano Cracolici

Giovanni Stefano

Stefano Cardanobile

Other publications of authors with the same name

A 64 GHz LNA With 15.5 dB Gain and 6.5 dB NF in 90 nm CMOS.S. Pellerano, Y. Palaskas, and K. Soumyanath. IEEE J. Solid State Circuits, 43 (7): 1542-1552 (2008)A 5-GHz 20-dBm Power Amplifier With Digitally Assisted AM-PM Correction in a 90-nm CMOS Process.Y. Palaskas, S. Taylor, S. Pellerano, I. Rippke, R. Bishop, A. Ravi, H. Lakdawala, and K. Soumyanath. IEEE J. Solid State Circuits, 41 (8): 1757-1763 (2006)A Fully Integrated 160-Gb/s D-Band Transmitter Achieving 1.1-pJ/b Efficiency in 22-nm FinFET.S. Callender, A. Agrawal, A. Whitcombe, R. Bhat, M. Rahman, C. Lee, P. Sagazio, G. Dogiamis, B. Carlton, C. Hull and 1 other author(s). IEEE J. Solid State Circuits, 57 (12): 3582-3598 (2022)Phase noise in digital frequency dividers.S. Levantino, L. Romanò, S. Pellerano, C. Samori, and A. Lacaita. IEEE J. Solid State Circuits, 39 (5): 775-784 (2004)A 1.7-GHz 1.5-mW digitally-controlled FBAR oscillator with 0.03-ppb resolution.H. Ito, H. Lakdawala, A. Ravi, S. Pellerano, R. Ruby, K. Soumyanath, and K. Masu. ESSCIRC, page 98-101. IEEE, (2008)Fully-integrated frequency synthesizers for multi-standard WLAN applications.S. Pellerano. Polytechnic University of Milan, Italy, (2004)A 5GHz 108Mb/s 2x2 MIMO Transceiver with Fully Integrated +16dBm PAs in 90nm CMOS.Y. Palaskas, A. Ravi, S. Pellerano, B. Carlton, M. Elmala, R. Bishop, G. Banerjee, R. Nicholls, S. Ling, S. Taylor and 1 other author(s). ISSCC, page 1420-1429. IEEE, (2006)A CMOS Wideband Current-Mode Digital Polar Power Amplifier With Built-In AM-PM Distortion Self-Compensation.J. Park, Y. Wang, S. Pellerano, C. Hull, and H. Wang. IEEE J. Solid State Circuits, 53 (2): 340-356 (2018)MIMO techniques for high data rate radio communications.Y. Palaskas, A. Ravi, and S. Pellerano. CICC, page 141-148. IEEE, (2008)Architecture and Circuit Choices for 5G Millimeter-Wave Beamforming Transceivers.P. Sagazio, S. Callender, W. Shin, O. Orhan, S. Pellerano, and C. Hull. IEEE Communications Magazine, 56 (12): 186-192 (2018)

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Disambiguation of "Pellerano, Stefano"

Please choose a person to relate this publication to

Fabrizio Queirolo Pellerano

Stefano Meini

Stefano Cracolici

Giovanni Stefano

Stefano Cardanobile

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Pellerano, Stefano"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A 2.4GHz WLAN transceiver with fully-integrated highly-linear 1.8V 28.4dBm PA, 34dBm T/R switch, 240MS/s DAC, 320MS/s ADC, and DPLL in 32nm SoC CMOS.

Please choose a person to relate this publication to

Fabrizio Queirolo Pellerano

Stefano Meini

Stefano Cracolici

Giovanni Stefano

Stefano Cardanobile

Other publications of authors with the same name

Disambiguation