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Rapid Arithmetic Level Simulation Based Energy Estimation for Hardware/Software Co-Design Using FPGAs., and . ERSA, page 55-61. CSREA Press, (2005)An Efficient Fixed Size Array for Solving Large Scale Toeplitz Systems-Abstract., , and . PPSC, page 19. SIAM, (1987)ModelML: a Markup Language for Automatic Model Synthesis., , and . IRI, page 317-322. IEEE Systems, Man, and Cybernetics Society, (2007)A Library of Parameterizable Floating-Point Cores for FPGAs and Their Application to Scientific Computing., , and . ERSA, page 137-148. CSREA Press, (2005)Optimizing Many-field Packet Classification on FPGA, Multi-core General Purpose Processor, and GPU., , , and . ANCS, page 87-98. IEEE Computer Society, (2015)Large-scale multi-flow regular expression matching on FPGA., , and . HPSR, page 70-75. IEEE, (2012)Scalable and dynamically updatable lookup engine for decision-trees on FPGA., and . HPEC, page 1-6. IEEE, (2014)Parallel Architectures and Algorithms for Image Component Labeling., and . IEEE Trans. Pattern Anal. Mach. Intell., 14 (10): 1014-1034 (1992)A Fast Algorithm for Computing a Histogram on Reconfigurable Mesh., , and . IEEE Trans. Pattern Anal. Mach. Intell., 17 (2): 97-106 (1995)Editors' Note., and . IEEE Trans. Computers, 55 (1): 1 (2006)