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Radiation-Hardened 0.3-0.9-V Voltage-Scalable 14T SRAM and Peripheral Circuit in 28-nm Technology for Space Applications., , , and . IEEE Trans. Very Large Scale Integr. Syst., 28 (4): 1089-1093 (2020)An Ultra-Low Power QRS Complex Detection Algorithm Based on Down-Sampling Wavelet Transform., , , and . IEEE Signal Process. Lett., 20 (5): 515-518 (2013)Low power design for FIR filter., , , and . ASICON, page 1-4. IEEE, (2013)Two-dimensional Parity-based Concurrent Error Detection Method for AES Algorithm against Differential Fault Attack and its VLSI Implementation., , , and . SiPS, page 151-156. IEEE, (2007)Fp2 arithmetic acceleration based on modified Barrett modular multiplication algorithm., , , and . ASICON, page 561-564. IEEE, (2017)Optimized digital automatic gain control for DVB-S2 system., , , , and . WTS, page 1-5. IEEE, (2010)Low-complexity two-stage timing acquisition scheme for UWB communications., , and . WTS, page 53-56. IEEE, (2008)Design Approach and Implementation of Application Specific Instruction Set Processor for SHA-3 BLAKE Algorithm., , , , and . IEICE Trans. Electron., 95-C (8): 1415-1426 (2012)A High-Throughput and Compact Hardware Implementation for the Reconstruction Loop in HEVC Intra Encoding., , , and . IEICE Trans. Electron., 100-C (6): 643-654 (2017)A Reconfigurable 74-140Mbps LDPC Decoding System for CCSDS Standard., , , , , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 104-A (11): 1509-1515 (2021)