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The Cydra 5 Departmental Supercomputer: Design Philosophies, Decisions, and Trade-offs.

, , , and . Computer, 22 (1): 12-35 (1989)

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Levels of representation of programs and the architecture of universal host machines.. MICRO, page 67-79. ACM, (1978)EPIC: Explicititly Parallel Instruction Computing., and . Computer, 33 (2): 37-45 (2000)Sentinel Scheduling for VLIW and Superscalar Processors., , , , , , and . ACM Trans. Comput. Syst., 11 (4): 376-408 (1993)preliminary version: ASPLOS 1992: 238-247.The era of embedded computing.. CASES, page 119. ACM, (2000)Register Allocation for Software Pipelined Loops., , , and . PLDI, page 283-299. ACM, (1992)Reverse If-Conversion., , , and . PLDI, page 290-299. ACM, (1993)Sentinel Scheduling for VLIW and Superscalar Processors., , , , and . ASPLOS, page 238-247. ACM Press, (1992)long version: TOCS 11(4): 376-408.Systematically derived instruction sets for high-level language support., , and . ACM Southeast Regional Conference, page 73-84. ACM, (1982)Cydra 5 Directed Dataflow Architecture.. COMPCON, page 106-113. IEEE Computer Society, (1988)A Constructive Solution to the Juggling Problem in Processor Array Synthesis., , , and . IPDPS, page 815-822. IEEE Computer Society, (2000)