( en | de | ru )

 

Disambiguation of "Fuketa, Hiroshi"

Author of the publication

copydeleteadd this publication to your clipboard
Variation-aware subthreshold logic circuit design.

, , , , , and . ASICON, page 1-4. IEEE, (2013)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Hiroshi Kawabe

Hiroshi Murata

Hiroshi Kubota

Hiroshi Uchida

Hiroshi Fukuzaki

 

Other publications of authors with the same name

92% start-up time reduction by variation-tolerant chirp injection (CI) and negative resistance booster (NRB) in 39MHz crystal oscillator., , , and . VLSIC, page 1-2. IEEE, (2014)Intermittent resonant clocking enabling power reduction at any clock frequency for 0.37V 980kHz near-threshold logic circuits., , , and . ISSCC, page 436-437. IEEE, (2013)Image-Classifier Deep Convolutional Neural Network Training by 9-bit Dedicated Hardware to Realize Validation Accuracy and Energy Efficiency Superior to the Half Precision Floating Point Format., , , , , , and . ISCAS, page 1-5. IEEE, (2018)Analysis to optimize sensitivity of RF energy harvester with voltage boost circuit., , , , , and . ECCTD, page 1-4. IEEE, (2015)Fully Integrated, 100-mV Minimum Input Voltage Converter With Gate-Boosted Charge Pump Kick-Started by LC Oscillator for Energy Harvesting., , and . IEEE Trans. Circuits Syst. II Express Briefs, 64-II (4): 392-396 (2017)Wireless Power Transfer With Zero-Phase-Difference Capacitance Control., , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 62-I (4): 938-947 (2015)Insole Pedometer With Piezoelectric Energy Harvester and 2 V Organic Circuits., , , , , , , , , and 4 other author(s). IEEE J. Solid State Circuits, 48 (1): 255-264 (2013)Transistor Variability Modeling and its Validation With Ring-Oscillation Frequencies for Body-Biased Subthreshold Circuits., , , and . IEEE Trans. Very Large Scale Integr. Syst., 18 (7): 1118-1129 (2010)A Cryogenic CMOS Current Integrator and Correlation Double Sampling Circuit for Spin Qubit Readout., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 70 (12): 5220-5228 (December 2023)Origin of Low-Frequency Noise in Si n-MOSFET at Cryogenic Temperatures: The Effect of Interface Quality., , , , , , , and . IEEE Access, (2023)