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Disambiguation of "Guthmuller, Eric"

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Trace-driven exploration of sharing set management strategies for cache coherence in manycores.

, , , and . NEWCAS, page 77-80. IEEE, (2017)

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Marie Guthmüller

Bodo Guthmüller

Marion Guthmuller

Friederike Erichsen-Wendt

Claus Erichsen

 

Other publications of authors with the same name

Accelerating Variants of the Conjugate Gradient with the Variable Precision Processor., , , , , and . ARITH, page 51-57. IEEE, (2022)Storage Class Memory with Computing Row Buffer: A Design Space Exploration., , , , , , , , , and . DATE, page 1-6. IEEE, (2021)3D stacking for multi-core architectures: From WIDEIO to distributed caches., , , , and . ISCAS, page 537-540. IEEE, (2013)IntAct: A 96-Core Processor With Six Chiplets 3D-Stacked on an Active Interposer With Distributed Interconnects and Integrated Power Management., , , , , , , , , and 18 other author(s). IEEE J. Solid State Circuits, 56 (1): 79-97 (2021)Architectural exploration of a fine-grained 3D cache for high performance in a manycore context., , and . VLSI-SoC, page 302-307. IEEE, (2013)Adaptive Stackable 3D Cache Architecture for Manycores., , and . ISVLSI, page 39-44. IEEE Computer Society, (2012)Interconnect Challenges for 3D Multi-cores: From 3D Network-on-Chip to Cache Interconnects., , , , , and . ISVLSI, page 615-620. IEEE Computer Society, (2015)2.3 A 220GOPS 96-Core Processor with 6 Chiplets 3D-Stacked on an Active Interposer Offering 0.6ns/mm Latency, 3Tb/s/mm2 Inter-Chiplet Interconnects and 156mW/mm2@ 82%-Peak-Efficiency DC-DC Converters., , , , , , , , , and 18 other author(s). ISSCC, page 46-48. IEEE, (2020)3D integration for power-efficient computing., , and . DATE, page 779-784. EDA Consortium San Jose, CA, USA / ACM DL, (2013)