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Disambiguation of "Abouzeid, Fady"

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Ultra-wide voltage range designs in fully-depleted silicon-on-insulator FETs.

, , , , , , , , , , , , , , , , , , , and . DATE, page 613-618. EDA Consortium San Jose, CA, USA / ACM DL, (2013)

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Fady Draidi

Fady Thaher

Pierre Abouzeid

Thomas Oliver Fadygas

Fady Albashiti

 

Other publications of authors with the same name

Scalable 0.35 V to 1.2 V SRAM Bitcell Design From 65 nm CMOS to 28 nm FDSOI., , , , , , , , and . IEEE J. Solid State Circuits, 49 (7): 1499-1505 (2014)27.1 A 460MHz at 397mV, 2.6GHz at 1.3V, 32b VLIW DSP, embedding FMAX tracking., , , , , , , , , and 12 other author(s). ISSCC, page 452-453. IEEE, (2014)FIRECAP: Fail-Reason Capturing hardware module for a RISC-V based System on a Chip., , , , , , , and . DFT, page 1-6. IEEE, (2021)A 0.32V, 55fJ per bit access energy, CMOS 65nm bit-interleaved SRAM with radiation Soft Error tolerance., , , , , and . ICICDT, page 1-4. IEEE, (2012)Scalable 0.35V to 1.2V SRAM bitcell design from 65nm CMOS to 28nm FDSOI., , , , , and . ESSCIRC, page 205-208. IEEE, (2013)8.4 A 0.33V/-40°C process/temperature closed-loop compensation SoC embedding all-digital clock multiplier and DC-DC converter exploiting FDSOI 28nm back-gate biasing., , , , , , , , , and 6 other author(s). ISSCC, page 1-3. IEEE, (2015)Design and performance parameters of an ultra-low voltage, single supply 32bit processor implemented in 28nm FDSOI technology., , , , , , , , , and 4 other author(s). ISQED, page 366-370. IEEE, (2015)Frequency and voltage effects on SER on a 65nm Sparc-V8 microprocessor under radiation test., , , , , , , and . IRPS, page 12. IEEE, (2015)A 240mV 1MHz, 340mV 10MHz, 40nm CMOS, 252 bits frame decoder using ultra-low voltage circuit design platform., , , , , and . ICECS, page 117-120. IEEE, (2011)A 2.7pJ/cycle 16MHz SoC with 4.3nW power-off ARM Cortex-M0+ core in 28nm FD-SOI., , , , , and . ESSCIRC, page 153-162. IEEE, (2017)