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On-chip timing uncertainty measurements on IBM microprocessors., , , , , , , , and . ITC, page 1-7. IEEE Computer Society, (2007)A Resonant Global Clock Distribution for the Cell Broadband-Engine Processor., , , , , , , , , and . ISSCC, page 512-513. IEEE, (2008)Implementation of the 65nm Cell Broadband Engine., , , , , , , , , and 4 other author(s). CICC, page 717-720. IEEE, (2007)Cell Processor Low-Power Design Methodology., , , , , , , and . IEEE Micro, 25 (6): 71-78 (2005)On-chip Timing Uncertainty Measurements on IBM Microprocessors., , , , , , , , and . ITC, page 1-7. IEEE Computer Society, (2008)The implementation of POWER7TM: A highly parallel and scalable multi-core high-end server processor., , , , , , , , , and 4 other author(s). ISSCC, page 102-103. IEEE, (2010)Key features of the design methodology enabling a multi-core SoC implementation of a first-generation CELL processor., , , , , , , , , and 13 other author(s). ASP-DAC, page 871-878. IEEE, (2006)The design methodology and implementation of a first-generation CELL processor: a multi-core SoC., , , , , , , , , and 8 other author(s). CICC, page 45-49. IEEE, (2005)A 5.2GHz microprocessor chip for the IBM zEnterprise™ system., , , , , , , , , and 17 other author(s). ISSCC, page 70-72. IEEE, (2011)