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Disambiguation of "Cha, Jaehoon"

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On the design of similarity measures based on fuzzy integral.

, , , and . IFSA-SCIS, page 1-6. IEEE, (2017)

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Maria Cha

Yongku Cha

Wansik Cha

Limei Cha

Kyungduck Cha

 

Other publications of authors with the same name

Large-Scale Location-Aware Services in Access: Hierarchical Building/Floor Classification and Location Estimation using Wi-Fi Fingerprinting Based on Deep Neural Networks., , , , , , and . CoRR, (2017)A 1.5-V 3.2 Gb/s/pin Graphic DDR4 SDRAM With Dual-Clock System, Four-Phase Input Strobing, and Low-Jitter Fully Analog DLL., , , , , , , , , and 2 other author(s). IEEE J. Solid State Circuits, 42 (11): 2369-2377 (2007)Orthogonality-Enforced Latent Space in Autoencoders: An Approach to Learning Disentangled Representations., and . ICML, volume 202 of Proceedings of Machine Learning Research, page 3913-3948. PMLR, (2023)Deep Learning-Based Rainfall Prediction Using Cloud Image Analysis., , , , and . IEEE Trans. Geosci. Remote. Sens., (2023)A 24-Gb/s/Pin 8-Gb GDDR6 With a Half-Rate Daisy-Chain-Based Clocking Architecture and I/O Circuitry for Low-Noise Operation., , , , , , , , , and 14 other author(s). IEEE J. Solid State Circuits, 57 (1): 212-223 (2022)Disentangling Autoencoders (DAE)., and . CoRR, (2022)Data Gathering and Application to Building Energy Optimization with Sensitivity Analysis for IoT Applications., , and . ISOCC, page 184-185. IEEE, (2019)A hierarchical auxiliary deep neural network architecture for large-scale indoor localization based on Wi-Fi fingerprinting., and . Appl. Soft Comput., (2022)Hierarchical Auxiliary Learning., , and . Mach. Learn. Sci. Technol., 1 (4): 45002 (2020)13.1 A 35.4Gb/s/pin 16Gb GDDR7 with a Low-Power Clocking Architecture and PAM3 IO Circuitry., , , , , , , , , and 14 other author(s). ISSCC, page 232-234. IEEE, (2024)