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A Model for Timing Errors in Processors with Parameter Variation., , and . ISQED, page 647-654. IEEE Computer Society, (2007)Unifying on-chip and inter-node switching within the Anton 2 network., , , and . ISCA, page 1-12. IEEE Computer Society, (2014)CADRE: Cycle-Accurate Deterministic Replay for Hardware Debugging., , and . DSN, page 301-312. IEEE Computer Society, (2006)Threshold Voltage Variation Effects on Aging-Related Hard Failure Rates., , and . ISCAS, page 1261-1264. IEEE, (2007)Estimating design time for system circuits., , , , and . VLSI-SoC, page 60-65. IEEE, (2007)Anton 3: twenty microseconds of molecular dynamics simulation before lunch., , , , , , , , , and 57 other author(s). SC, page 1. ACM, (2021)A Virtual Machine for Merit-Based Runtime Reconfiguration., and . FCCM, page 287-288. IEEE Computer Society, (2005)The ΛNTON 3 ASIC: a Fire-Breathing Monster for Molecular Dynamics Simulations., , , , , , , , , and 31 other author(s). HCS, page 1-22. IEEE, (2021)Blueshift: Designing processors for timing speculation from the ground up., , , , , , and . HPCA, page 213-224. IEEE Computer Society, (2009)Improving Per-Thread Performance on CMPs through Timing Speculation. University of Illinois Urbana-Champaign, USA, (2009)