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Performance-energy adaptation of parallel programs in pervasive computing.

, , , and . J. Supercomput., 70 (3): 1260-1278 (2014)

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An Energy-Oriented Evaluation of Buffer Cache Algorithms Using Parallel I/O Workloads., , and . IEEE Trans. Parallel Distributed Syst., 19 (11): 1565-1578 (2008)Trade-off Between Hit Rate and Hit Latency for Optimizing DRAM Cache., , , and . IEEE Trans. Emerg. Top. Comput., 9 (1): 55-64 (2021)RACE: An Efficient Redundancy-aware Accelerator for Dynamic Graph Neural Network., , , , , , , , , and 2 other author(s). ACM Trans. Archit. Code Optim., 20 (4): 53:1-53:26 (December 2023)Accelerate Hardware Logging for Efficient Crash Consistency in Persistent Memory., , , and . DATE, page 388-393. IEEE, (2022)NightWatch: Integrating Lightweight and Transparent Cache Pollution Control into Dynamic Memory Allocation Systems., , , , and . USENIX Annual Technical Conference, page 307-318. USENIX Association, (2015)Temporal characterization of SPEC CPU2006 workloads: Analysis and synthesis., , , and . IPCCC, page 11-20. IEEE Computer Society, (2012)Making Write Less Blocking for Read Accesses in Phase Change Memory., and . MASCOTS, page 269-277. IEEE Computer Society, (2012)Energy Efficient Buffer Cache Replacement for Data Servers., , , and . NAS, page 329-338. IEEE Computer Society, (2011)Reducing Read Latency in MLC PCM., and . NAS, page 1-6. IEEE Computer Society, (2016)Efficient Hardware-Assisted Crash Consistency in Encrypted Persistent Memory., , , and . DATE, page 750-755. IEEE, (2020)