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SIMD defragmenter: efficient ILP realization on data-parallel architectures.

, , , , and . ASPLOS, page 363-374. ACM, (2012)

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SAGE: A Storage-Based Approach for Scalable and Efficient Sparse Generalized Matrix-Matrix Multiplication., , , , , and . CIKM, page 923-933. ACM, (2023)Fine Grain Cache Partitioning Using Per-Instruction Working Blocks., , and . PACT, page 305-316. IEEE Computer Society, (2015)Runtime Profiling of OpenCL Workloads Using LLVM-based Code Instrumentation., , and . TENCON, page 1520-1524. IEEE, (2018)Core-level DVFS for Spatial Multitasking GPUs., , and . TENCON, page 1525-1528. IEEE, (2018)LOCKED-Free Journaling: Improving the Coalescing Degree in EXT4 Journaling., , and . NVMSA, page 1-6. IEEE, (2020)Improving GPU Multitasking Efficiency Using Dynamic Resource Sharing., , , , and . IEEE Comput. Archit. Lett., 18 (1): 1-5 (2019)An eDRAM-Based Approximate Register File for GPUs., , , and . IEEE Des. Test, 33 (1): 23-31 (2016)Selective DRAM cache bypassing for improving bandwidth on DRAM/NVM hybrid main memory systems., , , and . IEICE Electron. Express, 14 (11): 20170437 (2017)Efficient GPU multitasking with latency minimization and cache boosting., , and . IEICE Electron. Express, 14 (7): 20161158 (2017)Block Group Scheduling: A General Precision-scalable NPU Scheduling Technique with Capacity-aware Memory Allocation., , , , and . DATE, page 1-6. IEEE, (2023)