( en | de | ru )

 

Disambiguation of "Trivedi, Gaurav"

Author of the publication

copydeleteadd this publication to your clipboard
Application of Fast DC Analysis to Partitioning Hypergraphs

, and . Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on, page 3407--3410. IEEE, (May 2007)
DOI: 10.1109/iscas.2007.378299

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Gaurav Aggarwal

Gaurav Dhiman

Gaurav Baruah

Gaurav Gupta

Gaurav Sharma

 

Other publications of authors with the same name

An Interactive Tool for Natural Language Processing on Clinical Text., , , , , and . CoRR, (2017)A Security Framework for NoC Using Authenticated Encryption and Session Keys., , , and . Circuits Syst. Signal Process., 32 (6): 2605-2622 (2013)Multi-objective Hybrid Particle Swarm Optimization and its Application to Analog and RF Circuit Optimization., , , , and . Circuits Syst. Signal Process., 42 (8): 4443-4469 (August 2023)MInSC: A VLSI Architecture for Myocardial Infarction Stages Classifier for Wearable Healthcare Applications., , and . IEEE Trans. Circuits Syst. II Express Briefs, 70 (3): 1159-1163 (March 2023)Fast power density aware three-dimensional integrated circuit floorplanning for hard macroblocks using best operator combination genetic algorithm., , and . Int. J. Circuit Theory Appl., 51 (10): 4879-4896 (October 2023)An Optimized MOS-Based High Frequency Charge-Controlled Memcapacitor Emulator., , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 12 (4): 793-803 (2022)Comparative Review of Approximate Multipliers., , , and . RADIOELEKTRONIKA, page 1-6. IEEE, (2020)Design of a Low Power and Area Efficient Bfloat16 based Generalized Systolic Array for DNN Applications., , , , , and . RADIOELEKTRONIKA, page 1-5. IEEE, (2022)Comparison of Floating-point Representations for the Efficient Implementation of Machine Learning Algorithms., , , , , , and . RADIOELEKTRONIKA, page 1-6. IEEE, (2022)A Novel Low Power High Speed BEC for 2GHz Sampling Rate Flash ADC in 45nm Technology., , and . iNIS, page 133-138. IEEE, (2017)