( en | de | ru )

 

Disambiguation of "Choi, Seonil"

Author of the publication

copydeleteadd this publication to your clipboard
Domain-Specific Modeling for Rapid Energy Estimation of Reconfigurable Architectures.

, , , and . J. Supercomput., 26 (3): 259-281 (2003)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Andreas Choi

Jinchul Choi

Chiwon Choi

Bongkyung Choi

Jinsub Choi

 

Other publications of authors with the same name

Configurable Hardware for Symbolic Search Operations., , and . ICPADS, page 122-131. IEEE Computer Society, (1997)Analysis of High-Performance Floating-Point Arithmetic on FPGAs., , , and . IPDPS, IEEE Computer Society, (2004)Time and Energy Efficient Matrix Factorization Using FPGAs., and . FPL, volume 2778 of Lecture Notes in Computer Science, page 507-519. Springer, (2003)Energy-efficient signal processing using FPGAs., , , and . FPGA, page 225-234. ACM, (2003)Energy-Efficient Matrix Multiplication on FPGAs., , and . FPL, volume 2438 of Lecture Notes in Computer Science, page 534-544. Springer, (2002)A High-Performance and Energy-Efficient Architecture for Floating-Point Based LU Decomposition on FPGAs., , , , , and . IPDPS, IEEE Computer Society, (2004)A Model-Based Methodology for Application Specific Energy Efficient Data Path Design Using FPGAs., , , and . ASAP, page 76-87. IEEE Computer Society, (2002)Domain-Specific Modeling for Rapid Energy Estimation of Reconfigurable Architectures., , , and . J. Supercomput., 26 (3): 259-281 (2003)Energy efficiency of FPGAs and programmable processors for matrix multiplication., , and . FPT, page 422-425. IEEE, (2002)Performance Modeling of Reconfigurable SoC Architectures and Energy-Efficient Mapping of a Class of Applications., , and . FCCM, page 241-250. IEEE Computer Society, (2003)