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Efficient false path elimination algorithms for timing verification by event graph preprocessing.

, , , , , and . Integr., 8 (2): 173-187 (1989)

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Loop Optimization in Register-Transfer Scheduling for DSP-Systems., , and . DAC, page 826-831. ACM Press, (1989)Static Timing Analysis of Dynamically Sensitizable Paths., , and . DAC, page 568-573. ACM Press, (1989)An intelligent module generator environment., , , and . DAC, page 730-735. IEEE Computer Society Press, (1986)Solving large scale assignment problems in high-level synthesis by approximative quadratic programming., , , and . ACM Great Lakes Symposium on VLSI, page 19-24. ACM, (2001)Control flow optimization for fast system simulation and storage minimization., , , , and . EDAC-ETC-EUROASIC, page 20-24. IEEE Computer Society, (1994)Design technology research for the nineties: more of the same?. EURO-DAC, page 592-596. IEEE Computer Society Press, (1992)Impact of technology scaling on substrate noise generation mechanisms mixed signal ICs., , , , , and . CICC, page 501-504. IEEE, (2004)Formalized three-layer system-level model and reuse methodology for embedded data-dominated applications., , , and . IEEE Trans. Very Large Scale Integr. Syst., 8 (2): 207-216 (2000)Background memory area estimation for multidimensional signal processing systems., , and . IEEE Trans. Very Large Scale Integr. Syst., 3 (2): 157-172 (1995)A Proof of the Nonrestoring Division Algorithm and its Implementation on an ALU., , and . Formal Methods Syst. Des., 4 (1): 5-31 (1994)