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Disambiguation of "sun Seo, Jae"

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Reducing the Model Order of Deep Neural Networks Using Information Theory.

, , , and . ISVLSI, page 93-98. IEEE Computer Society, (2016)

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Sun-Aea Seo

Sun-Jae Lee

Sun-Jae Song

Jae-Sun Kim

Jae Sun Gross-Lee

 

Other publications of authors with the same name

In situ delay-slack monitor for high-performance processors using an all-digital self-calibrating 5ps resolution time-to-digital converter., , , , , , and . ISSCC, page 188-189. IEEE, (2010)Fully-integrated switched-capacitor voltage regulator with on-chip current-sensing and workload optimization in 32nm SOI CMOS., , , , and . ISLPED, page 140-145. IEEE, (2015)A 8.93-TOPS/W LSTM Recurrent Neural Network Accelerator Featuring Hierarchical Coarse-Grain Sparsity With All Parameters Stored On-Chip., , , and . ESSCIRC, page 119-122. IEEE, (2019)An On-Chip Learning Accelerator for Spiking Neural Networks using STT-RAM Crossbar Arrays., , , and . DATE, page 1019-1024. IEEE, (2020)A 2.5 mW 80 dB DR 36 dB SNDR 22 MS/s Logarithmic Pipeline ADC., , , , , , and . IEEE J. Solid State Circuits, 44 (10): 2755-2765 (2009)C3SRAM: An In-Memory-Computing SRAM Macro Based on Robust Capacitive Coupling Computing Mechanism., , , and . IEEE J. Solid State Circuits, 55 (7): 1888-1897 (2020)A Fixed-Point Neural Network Architecture for Speech Applications on Resource Constrained Hardware., , , , , , , and . J. Signal Process. Syst., 90 (5): 727-741 (2018)Deep Convolutional Neural Network Accelerator Featuring Conditional Computing and Low External Memory Access., and . CICC, page 1-4. IEEE, (2020)Cases for Analog Mixed Signal Computing Integrated Circuits for Deep Neural Networks., , , , and . VLSI-DAT, page 1-2. IEEE, (2019)An Energy-Efficient Deep Convolutional Neural Network Accelerator Featuring Conditional Computing and Low External Memory Access., and . IEEE J. Solid State Circuits, 56 (3): 803-813 (2021)