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Disambiguation of "Vaishnav, Hirendu"

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Logic extraction based on normalized netlengths.

, and . ICCD, page 658-663. IEEE Computer Society, (1995)

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Other publications of authors with the same name

Delay optimal partitioning targeting low power VLSI circuits., and . ICCAD, page 638-643. IEEE Computer Society / ACM, (1995)Logic extraction based on normalized netlengths., and . ICCD, page 658-663. IEEE Computer Society, (1995)Routability-Driven Fanout Optimization., and . DAC, page 230-235. ACM Press, (1993)Alphabetic trees-theory and applications in layout-driven logicsynthesis., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 20 (1): 58-69 (2001)Delay-optimal clustering targeting low-power VLSI circuits., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 18 (6): 799-812 (1999)Post Layout Speed-up by Event Elimination., , and . ICCD, page 211-216. IEEE Computer Society, (1997)Power Optimization in VLSI Layout: A Survey., and . VLSI Signal Processing, 15 (3): 221-232 (1997)Minimizing the Routing Cost During Logic Extraction., and . DAC, page 70-75. ACM Press, (1995)PCUBE: A performance driven placement algorithm for low power designs., and . EURO-DAC, page 72-77. IEEE Computer Society, (1993)