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Disambiguation of "Roldan, Arianne"

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A 40-to-56 Gb/s PAM-4 Receiver With Ten-Tap Direct Decision-Feedback Equalization in 16-nm FinFET.

, , , , , , , , , , , , , , , , and . IEEE J. Solid State Circuits, 52 (12): 3486-3502 (2017)

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Gabriel Roldan

Julio Roldán

Marisa Arianne Baur

Beatriz Roldán Cuenya

Melba Muñoz Roldán

 

Other publications of authors with the same name

A 32.75-Gb/s voltage mode transmitter with 3-tap FFE in 16nm CMOS., , , , , , , , , and 1 other author(s). A-SSCC, page 233-236. IEEE, (2016)A 112-Gb/s PAM-4 Long-Reach Wireline Transceiver Using a 36-Way Time-Interleaved SAR ADC and Inverter-Based RX Analog Front-End in 7-nm FinFET., , , , , , , , , and 11 other author(s). IEEE J. Solid State Circuits, 56 (1): 7-18 (2021)A 126mW 56Gb/s NRZ wireline transceiver for synchronous short-reach applications in 16nm FinFET., , , , , , , , , and 6 other author(s). ISSCC, page 274-276. IEEE, (2018)A 40-to-56 Gb/s PAM-4 Receiver With Ten-Tap Direct Decision-Feedback Equalization in 16-nm FinFET., , , , , , , , , and 7 other author(s). IEEE J. Solid State Circuits, 52 (12): 3486-3502 (2017)A Fully Adaptive 19-58-Gb/s PAM-4 and 9.5-29-Gb/s NRZ Wireline Transceiver With Configurable ADC in 16-nm FinFET., , , , , , , , , and 6 other author(s). IEEE J. Solid State Circuits, 54 (1): 18-28 (2019)A fully adaptive 19-to-56Gb/s PAM-4 wireline transceiver with a configurable ADC in 16nm FinFET., , , , , , , , , and 6 other author(s). ISSCC, page 108-110. IEEE, (2018)A 32.75-Gb/s Voltage-Mode Transmitter With Three-Tap FFE in 16-nm CMOS., , , , , , , , , and 2 other author(s). IEEE J. Solid State Circuits, 52 (10): 2663-2678 (2017)A 112-GB/S PAM4 Transmitter in 16NM FinFET., , , , , , , , , and 3 other author(s). VLSI Circuits, page 45-46. IEEE, (2018)6.1 A 112Gb/s PAM-4 Long-Reach Wireline Transceiver Using a 36-Way Time-Interleaved SAR-ADC and Inverter-Based RX Analog Front-End in 7nm FinFET., , , , , , , , , and 11 other author(s). ISSCC, page 116-118. IEEE, (2020)A 2.25pJ/bit Multi-lane Transceiver for Short Reach Intra-package and Inter-package Communication in 16nm FinFET., , , , , , , , , and 9 other author(s). CICC, page 1-8. IEEE, (2019)