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Disambiguation of "Sadi, Mohammad Hassani"

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A Weighted Current Summation Based Mixed Signal DRAM-PIM Architecture for Deep Neural Network Inference.

, , , , , , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 12 (2): 367-380 (2022)

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Mounir Hassani

Walid Hassani

Omar Sadi

Seddiq Hassani

Sina Hassani

 

Other publications of authors with the same name

A Weighted Current Summation Based Mixed Signal DRAM-PIM Architecture for Deep Neural Network Inference., , , , , , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 12 (2): 367-380 (2022)High-throughput configurable SIMON architecture for flexible security., , and . Microelectron. J., (2021)A Critical Assessment of DRAM-PIM Architectures - Trends, Challenges and Solutions., , , , and . SAMOS, volume 13511 of Lecture Notes in Computer Science, page 362-379. Springer, (2022)Microscaling-Stochastic Computing Based Systolic Arrays for Energy-Efficient Deep Neural Network Inference., , and . DATE, page 1-3. IEEE, (2026)Optimization of DRAM based PIM Architecture for Energy-Efficient Deep Neural Network Training., , , and . ISCAS, page 1472-1476. IEEE, (2022)Efficient Deep Neural Network Training With a Novel 5.3-Bit Block Floating Point Data Format., , , and . IEEE Trans. Circuits Syst. Artif. Intell., 2 (2): 150-161 (June 2025)FPGA-based Trainable Autoencoder for Communication Systems., , , , , , and . FPGA, page 154. ACM, (2022)Novel adaptive quantization methodology for 8-bit floating-point DNN training., , and . Des. Autom. Embed. Syst., 28 (2): 91-110 (June 2024)