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An Accelerator for High Efficient Vision Processing.

, , , , , , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 36 (2): 227-240 (2017)

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Speculative DMA for architecturally visible storage in instruction set extensions., , , and . CODES+ISSS, page 243-248. ACM, (2008)A first step towards automatic application of power analysis countermeasures., , , , and . DAC, page 230-235. ACM, (2011)Way Stealing: cache-assisted automatic instruction set extensions., , , and . DAC, page 31-36. ACM, (2009)Virtual memory window for application-specific reconfigurable coprocessors., , and . DAC, page 948-953. ACM, (2004)Digital Connectionist Hardware: Current Problems and Future Challenges.. IWANN, volume 1240 of Lecture Notes in Computer Science, page 688-713. Springer, (1997)A Design Flow and Evaluation Framework for DPA-Resistant Instruction Set Extensions., , , , , , , and . CHES, volume 5747 of Lecture Notes in Computer Science, page 205-219. Springer, (2009)On-Chip Self-Calibrating Communication Techniques Robust to Electrical Parameter Variations., , , and . IEEE Des. Test Comput., 21 (6): 524-535 (2004)Seamless Hardware-Software Integration in Reconfigurable Computing Systems., , and . IEEE Des. Test Comput., 22 (2): 102-113 (2005)A flexible DSP block to enhance FPGA arithmetic performance., , , , , and . FPT, page 70-77. IEEE Computer Society, (2009)Improving FPGA Performance for Carry-Save Arithmetic., , , and . IEEE Trans. Very Large Scale Integr. Syst., 18 (4): 578-590 (2010)