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A Formal Perspective on Effective Post-silicon Debug and Trace Signal Selection.

, , , , and . VDAT, volume 711 of Communications in Computer and Information Science, page 753-766. Springer, (2017)

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Revisiting random access scan for effective enhancement of post-silicon observability., , , , and . IOLTS, page 132-137. IEEE, (2017)Post-silicon observability enhancement with topology based trace signal selection., , , and . LATS, page 1-6. IEEE, (2017)A Formal Perspective on Effective Post-silicon Debug and Trace Signal Selection., , , , and . VDAT, volume 711 of Communications in Computer and Information Science, page 753-766. Springer, (2017)A trace signal selection algorithm for improved post-silicon debug., , and . EWDTS, page 1-4. IEEE Computer Society, (2016)Improving post-silicon error detection with topological selection of trace signals., , , , and . VLSI-SoC, page 1-6. IEEE, (2017)ELURA: A Methodology for Post-Silicon Gate-Level Error Localization Using Regression Analysis., , , and . VLSID, page 410-415. IEEE Computer Society, (2018)A Methodology for Trace Signal Selection to Improve Error Detection in Post-Silicon Validation., , , and . VLSID, page 147-152. IEEE Computer Society, (2017)Combining Restorability and Error Detection Ability for Effective Trace Signal Selection., , , and . ACM Great Lakes Symposium on VLSI, page 191-196. ACM, (2017)Silicon Debug with Maximally Expanded Internal Observability Using Nearest Neighbor Algorithm., , , , and . ISVLSI, page 46-51. IEEE Computer Society, (2018)Virtual Indian Sign Language Interpreter., , , , and . ICVISP, page 16:1-16:5. ACM, (2020)