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Statistical Timing Analysis Considering Device and Interconnect Variability for BEOL Requirements in the 5-nm Node and Beyond.

T. Bao, J. Ryckaert, Z. Tokei, A. Mercha, D. Verkest, A. Thean, and P. Wambacq. IEEE Trans. Very Large Scale Integr. Syst., 25 (5): 1669-1680 (2017)

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Julien Köhrle

Julien Bonnamour

Julien Ndinga

Julien Coignet

Julien Béthune

Other publications of authors with the same name

A 2.4 GHz Low-Power Sixth-Order RF Bandpass ΔΣ Converter in CMOS.J. Ryckaert, J. Borremans, B. Verbruggen, L. Bos, C. Armiento, J. Craninckx, and G. der Plas. IEEE J. Solid State Circuits, 44 (11): 2873-2880 (2009)A 2-mm2 0.1-5 GHz Software-Defined Radio Receiver in 45-nm Digital CMOS.V. Giannini, P. Nuzzo, C. Soens, K. Vengattaramane, J. Ryckaert, M. Goffioul, B. Debaillie, J. Borremans, J. Driessche, J. Craninckx and 1 other author(s). IEEE J. Solid State Circuits, 44 (12): 3486-3498 (2009)3D SRAM Macro Design in 3D Nanofabric Process Technology.D. Abdi, S. Salahuddin, J. Bömmels, E. Giacomin, P. Weckx, J. Ryckaert, G. Hellings, and F. Catthoor. IEEE Trans. Circuits Syst. I Regul. Pap., 70 (7): 2858-2867 (July 2023)Towards Chip-Package-System Co-optimization of Thermally-limited System-On-Chips (SOCs).S. Mishra, S. Venkateswarlu, B. Vermeersch, M. Brunion, M. Lofrano, D. Abdi, H. Oprins, D. Biswas, O. Zografos, G. Hiblot and 6 other author(s). IRPS, page 1-7. IEEE, (2023)A fast start-up 3GHz-10GHz digitally controlled oscillator for UWB impulse radio in 90nm CMOS.V. Heyn, G. der Plas, J. Ryckaert, and J. Craninckx. ESSCIRC, page 484-487. IEEE, (2007)PPA and Scaling Potential of Backside Power Options in N2 and A14 Nanosheet Technology.S. Yang, P. Schuddinck, M. Bardon, Y. Xiang, A. Veloso, B. Chan, G. Mirabelli, G. Hiblot, G. Hellings, and J. Ryckaert. VLSI Technology and Circuits, page 1-2. IEEE, (2023)Backside PDN and 2.5D MIMCAP to Double Boost 2D and 3D ICs IR-Drop beyond 2nm Node.R. Chen, G. Sisto, M. Stucchi, A. Jourdain, K. Miyaguchi, P. Schuddinck, P. Woeltgens, H. Lin, N. Kakarla, A. Veloso and 7 other author(s). VLSI Technology and Circuits, page 429-430. IEEE, (2022)Design technology co-optimization for enabling 5nm gate-all-around nanowire 6T SRAM.T. Bao, S. Sakhare, J. Ryckaert, D. Yakimets, A. Mercha, D. Verkest, A. Thean, and P. Wambacq. ICICDT, page 1-4. IEEE, (2015)Evaluation of Nanosheet and Forksheet Width Modulation for Digital IC Design in the Sub-3-nm Era.G. Sisto, O. Zografos, B. Chehab, N. Kakarla, Y. Xiang, D. Milojevic, P. Weckx, G. Hellings, and J. Ryckaert. IEEE Trans. Very Large Scale Integr. Syst., 30 (10): 1497-1506 (2022)Analog-Digital Partitioning for Low-Power UWB Impulse Radios under CMOS Scaling.M. Badaroglu, C. Desset, J. Ryckaert, V. Heyn, G. der Plas, P. Wambacq, and B. van Poucke. EURASIP J. Wireless Comm. and Networking, (2006)

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Disambiguation of "Ryckaert, Julien"

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Statistical Timing Analysis Considering Device and Interconnect Variability for BEOL Requirements in the 5-nm Node and Beyond.

Please choose a person to relate this publication to

Julien Köhrle

Julien Bonnamour

Julien Ndinga

Julien Coignet

Julien Béthune

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Ryckaert, Julien"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Statistical Timing Analysis Considering Device and Interconnect Variability for BEOL Requirements in the 5-nm Node and Beyond.

Please choose a person to relate this publication to

Julien Köhrle

Julien Bonnamour

Julien Ndinga

Julien Coignet

Julien Béthune

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
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APA
Chicago
DIN 1505
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MSOffice XML

Statistical Timing Analysis Considering Device and Interconnect Variability for BEOL Requirements in the 5-nm Node and Beyond.