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High-Level Synthesis of Multiple Word-Length DSP Algorithms Using Heterogeneous-Resource FPGAs.

G. Caffarena, J. López, C. Carreras, and O. Nieto-Taladriz. FPL, page 1-4. IEEE, (2006)

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Octavio Weinhold

Huber Nieto-Chaupis

Isidro Nieto

José Nieto

Gregoire Nieto

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Forecasting Based on Short Time Series Using ANNs and Grey Theory - Some Basic Comparisons.J. Milojkovic, V. Litovski, O. Nieto-Taladriz, and S. Bojanic. IWANN (1), volume 6691 of Lecture Notes in Computer Science, page 183-190. Springer, (2011)Improving security in WMNs with reputation systems and self-organizing maps.Z. Bankovic, D. Fraga, J. Moya, J. Vallejo, P. Malagón, Á. Araujo, J. de Goyeneche, E. Romero, J. Blesa, D. Villanueva and 1 other author(s). J. Netw. Comput. Appl., 34 (2): 455-463 (2011)Architectural Synthesis of Fixed-Point DSP Datapaths Using FPGAs.G. Caffarena, J. López, G. Leyva, C. Carreras, and O. Nieto-Taladriz. Int. J. Reconfigurable Comput., (2009)Evaluating Sequential Combination of Two Genetic Algorithm-Based Solutions for Intrusion Detection.Z. Bankovic, S. Bojanic, and O. Nieto-Taladriz. CISIS, volume 53 of Advances in Soft Computing, page 147-154. Springer, (2008)A Scalable Security Framework for Reliable AmI Applications Based on Untrusted Sensors.J. Moya, J. Vallejo, P. Malagón, Á. Araujo, J. de Goyeneche, and O. Nieto-Taladriz. WWIC, volume 5546 of Lecture Notes in Computer Science, page 73-84. Springer, (2009)Utilization factor of a distributed system based on an Ethernet network.J. González, O. Nieto-Taladriz, and J. Quinteiro-González. PDP, page 273-277. IEEE, (1993)SORU: A Reconfigurable Vector Unit for Adaptable Embedded Systems.J. Moya, J. Escolar, J. Martín, J. Vallejo, P. Malagón, Á. Araujo, J. de Goyeneche, A. Rubio, E. Romero, D. Villanueva and 2 other author(s). ARC, volume 5453 of Lecture Notes in Computer Science, page 255-260. Springer, (2009)Evaluation, Energy Optimization, and Spectrum Analysis of an Artificial Noise Technique to Improve CWSN Security.J. Blesa, Á. Araujo, E. Romero, and O. Nieto-Taladriz. IJDSN, (2013)Optimal combined word-length allocation and architectural synthesis of digital signal processing circuits.G. Caffarena, G. Constantinides, P. Cheung, C. Carreras, and O. Nieto-Taladriz. IEEE Trans. Circuits Syst. II Express Briefs, 53-II (5): 339-343 (2006)Modular Framework for Smart Home Applications.J. Blesa, P. Malagón, Á. Araujo, J. Moya, J. Vallejo, J. de Goyeneche, E. Romero, D. Villanueva, and O. Nieto-Taladriz. IWANN (2), volume 5518 of Lecture Notes in Computer Science, page 695-701. Springer, (2009)

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Disambiguation of "Nieto-Taladriz, Octavio"

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High-Level Synthesis of Multiple Word-Length DSP Algorithms Using Heterogeneous-Resource FPGAs.

Please choose a person to relate this publication to

Octavio Weinhold

Huber Nieto-Chaupis

Isidro Nieto

José Nieto

Gregoire Nieto

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Nieto-Taladriz, Octavio"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML High-Level Synthesis of Multiple Word-Length DSP Algorithms Using Heterogeneous-Resource FPGAs.

Please choose a person to relate this publication to

Octavio Weinhold

Huber Nieto-Chaupis

Isidro Nieto

José Nieto

Gregoire Nieto

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

High-Level Synthesis of Multiple Word-Length DSP Algorithms Using Heterogeneous-Resource FPGAs.