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Disambiguation of "Gizopoulos, Dimitris"

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MeRLiN: Exploiting Dynamic Instruction Behavior for Fast and Accurate Microarchitecture Level Reliability Assessment.

, , , and . ISCA, page 241-254. ACM, (2017)

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Dimitris Stathakos

Dimitris Mislis

Dimitris Kazarnovskis

Dimitris Theodoropoulos

Dimitris Depountis

 

Other publications of authors with the same name

The future of fault tolerant computing., , , , and . IOLTS, page 108-109. IEEE, (2015)Instruction-Based Self-Testing of Processor Cores., , , and . J. Electron. Test., 19 (2): 103-112 (2003)Effective software-based self-test strategies for on-line periodic testing of embedded processors., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 24 (1): 88-99 (2005)Software-Based Self-Testing of Symmetric Shared-Memory Multiprocessors., , , and . IEEE Trans. Computers, 58 (12): 1682-1694 (2009)Software-Based Self Test Methodology for On-Line Testing of L1 Caches in Multithreaded Multicore Architectures., , , and . IEEE Trans. Very Large Scale Integr. Syst., 21 (4): 786-790 (2013)Statistical Analysis of Multicore CPUs Operation in Scaled Voltage Conditions., , , and . IEEE Comput. Archit. Lett., 17 (2): 109-112 (2018)Reliability challenges of real-time systems in forthcoming technology nodes., , , , , and . DATE, page 129-134. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Chip Self-Organization and Fault Tolerance in Massively Defective Multicore Arrays., , , and . IEEE Trans. Dependable Secur. Comput., 8 (2): 207-217 (2011)Soft Error Effects on Arm Microprocessors: Early Estimations Versus Chip., , , , and . Computer, 56 (7): 4-6 (2023)Towards Accurate Performance Modeling of RISC-V Designs., , , and . CoRR, (2021)