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Cathedral-III: Architecture-Driven High-level Synthesis for High Throughput DSP Applications.

, , , and . DAC, page 597-602. ACM, (1991)

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Cathedral-III: Architecture-Driven High-level Synthesis for High Throughput DSP Applications., , , and . DAC, page 597-602. ACM, (1991)Partitioning-Based Allocation of Dedicated Data-Paths in the Architectural Synthesis for High Throughput Applications., , , and . VLSI, volume A-1 of IFIP Transactions, page 193-202. North-Holland, (1991)Rapid prototyping of DSP systems: requirements and solutions., , and . RSP, page 88-96. IEEE Computer Society, (1995)An ASIC-architecture for VLSI-implementation of the RBN-algorithm., , , , and . ICPR (2), page 408-412. IEEE, (1990)Real-time emulation of DSP applications on programmable DSPs and FPGAs., , and . ICECS, page 554-557. IEEE, (1996)Efficient code generation for in-house DSP-cores., , , , and . ED&TC, page 244-251. IEEE Computer Society, (1995)Definition and assignment of complex data-paths suited for high throughput applications., , , and . ICCAD, page 108-111. IEEE Computer Society, (1989)Combined hardware selection and pipelining in high-performance data-path design., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 11 (4): 413-423 (1992)Architecture-driven synthesis techniques for VLSI implementation of DSP algorithms., , , , , , and . Proc. IEEE, 78 (2): 319-335 (1990)A Data Path Layout Assembler for High Performance DSP Circuits., , , and . DAC, page 306-311. IEEE Computer Society Press, (1990)