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Disambiguation of "Charles, Henri-Pierre"

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Reconfigurable tiles of computing-in-memory SRAM architecture for scalable vectorization.

, , , , , , , and . ISLPED, page 121-126. ACM, (2020)

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Charles-Henri Clerget

Charles-Henri Cappelaere

Pierre-Henri Horrein

Pierre-Henri Campanac

Henri-Pierre Maumary

 

Other publications of authors with the same name

Code specialization for red-black tree management algorithms, , and . Proceedings of the 3rd International Workshop on Adaptive Self-Tuning Computing Systems, page 6:1--6:3. New York, NY, USA, ACM, (2013)Data cache management on EPIC architecture: optimizing memory access for image processing., and . SIGARCH Comput. Archit. News, 32 (3): 35-42 (2004)Improving performance of optimized kernels through fast instantiations of templates., , and . Concurr. Comput. Pract. Exp., 21 (1): 59-70 (2009)Music synthesis description with the data flow language lustre., and . Microprocessing and Microprogramming, 27 (1-5): 551-556 (1989)Efficient data driven run-time code generation., and . LCR, page 17:1-17:7. ACM, (2004)Instruction Set Design Methodology for In-Memory Computing through QEMU-based System Emulator., , , and . RSP, page 43-49. IEEE, (2021)Reconfigurable tiles of computing-in-memory SRAM architecture for scalable vectorization., , , , , , , and . ISLPED, page 121-126. ACM, (2020)Applying Code Specialization to FFT Libraries for Integral Parameters., and . LCPC, volume 4382 of Lecture Notes in Computer Science, page 96-110. Springer, (2006)Automated software protection for the masses against side-channel attacks., , , and . IACR Cryptology ePrint Archive, (2018)Loop unrolling for processors with instruction cache.. Algorithms and Parallel VLSI Architectures, page 311-316. Elsevier, (1991)