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An 8Gb/s/pin 4pJ/b/pin Single-T-Line dual (base+RF) band simultaneous bidirectional mobile memory I/O interface with inter-channel interference suppression., , , , , , , and . ISSCC, page 50-52. IEEE, (2012)Utilizing Radio-Frequency Interconnect for a Many-DIMM DRAM System., , , , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 2 (2): 210-227 (2012)An Energy-Efficient and High-Speed Mobile Memory I/O Interface Using Simultaneous Bi-Directional Dual (Base+RF)-Band Signaling., , , , and . IEEE J. Solid State Circuits, 47 (1): 117-130 (2012)Analysis of Noncoherent ASK Modulation-Based RF-Interconnect for Memory Interface., , , , , , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 2 (2): 200-209 (2012)Utilizing RF-I and intelligent scheduling for better throughput/watt in a mobile GPU memory system., , , , and . TACO, 8 (4): 51:1-51:19 (2012)The DIMM tree architecture: A high bandwidth and scalable memory system., , , , , and . ICCD, page 388-395. IEEE Computer Society, (2011)An 8.4Gb/s 2.5pJ/b mobile memory I/O interface using simultaneous bidirectional Dual (Base+RF) band signaling., , , , , , , , , and . ISSCC, page 488-490. IEEE, (2011)Alloy: Parallel-serial memory channel architecture for single-chip heterogeneous processor systems., , , , and . HPCA, page 296-308. IEEE Computer Society, (2015)A Low-Overhead and Low-Power RF Transceiver for Short-Distance On- and Off-Chip Interconnects., , and . IEICE Trans. Electron., 94-C (5): 854-857 (2011)