( en | de | ru )

 

Disambiguation of "Roncken, Marly"

Author of the publication

copydeleteadd this publication to your clipboard
RAPPID: An Asynchronous Instruction Length Decoder.

, , , , , , , , , and . ASYNC, page 60-70. IEEE Computer Society, (1999)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Jochen Marly

Marly Antonia Maldaner Jacobi

 

Other publications of authors with the same name

Modular Timing Constraints for Delay-Insensitive Systems., , , , and . J. Comput. Sci. Technol., 31 (1): 77-106 (2016)Linear Test Times for Delay-Insensitive Circuits: a Compilation Strategy., and . Asynchronous Design Methodologies, volume A-28 of IFIP Transactions, page 13-27. North-Holland, (1993)CA-BIST for Asynchronous Circuits: A Case Study on the RAPPID Asynchronous Instruction Length Decoder., , , , and . ASYNC, page 62-72. IEEE Computer Society, (2000)Fsimac: a fault simulator for asynchronous sequential circuits., , , , and . Asian Test Symposium, page 114-119. IEEE Computer Society, (2000)RAPPID: An Asynchronous Instruction Length Decoder., , , , , , , , , and . ASYNC, page 60-70. IEEE Computer Society, (1999)A Proof System for Brinch Hansen's Distributed Processes., , and . GI Jahrestagung, volume 50 of Informatik-Fachberichte, page 88-95. Springer, (1981)CAD Directions for High Performance Asynchronous Circuits., , , , , , and . DAC, page 116-121. ACM Press, (1999)Naturalized Communication and Testing., , , , , and . ASYNC, page 77-84. IEEE Computer Society, (2015)Data-Loop-Free Self-Timed Circuit Verification., , , , and . ASYNC, page 51-58. IEEE Computer Society, (2018)Rob Tristan Gerth: 1956?2003., and . CAV, volume 3114 of Lecture Notes in Computer Science, page 1-14. Springer, (2004)