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Improving FPGA Design with Monolithic 3D Integration Using High Dense Inter-Stack Via.

S. Srinivasa, K. Mohan, W. Chen, K. Hsu, X. Li, M. Chang, S. Gupta, J. Sampson, and V. Narayanan. ISVLSI, page 128-133. IEEE Computer Society, (2017)

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Hao Chen

Wei Chen

Other publications of authors with the same name

Automatic assessment of affective episodes for daily activities analysis.Y. Chiu, K. Huang, H. Chiu, and W. Chen. APSIPA, page 1-4. IEEE, (2014)Novel Detection of Image Forgery for Exchanged Foreground and Background Using Image Watermarking Based on Alpha Matte.W. Hu, W. Chen, D. Huang, and C. Yang. ICGEC, page 245-248. IEEE, (2012)Low-Power Embedded DSP Core for Communication Systems.Y. Tsao, W. Chen, M. Tan, M. Lin, and S. Jou. EURASIP J. Adv. Signal Process., 2003 (13): 1355-1370 (2003)A Dual-Data Line Read Scheme for High-Speed Low-Energy Resistive Nonvolatile Memories.A. Lee, H. Lee, F. Ebrahimi, B. Lam, W. Chen, M. Chang, P. Amiri, and K. Wang. IEEE Trans. Very Large Scale Integr. Syst., 26 (2): 272-279 (2018)Location-routing problem with time-dependent demands.V. Yu, N. Normasari, and W. Chen. Comput. Ind. Eng., (2021)Confronting Ambiguity in 6D Object Pose Estimation via Score-Based Diffusion on SE(3).T. Hsiao, H. Chen, H. Yang, and C. Lee. CoRR, (2023)A real-time spatiotemporal AI model analyzes skill in open surgical videos.E. Goodman, K. Patel, Y. Zhang, W. Locke, C. Kennedy, R. Mehrotra, S. Ren, M. Guan, M. Downing, H. Chen and 3 other author(s). CoRR, (2021)SurfNetv2: An Improved Real-Time SurfNet and Its Applications to Defect Recognition of Calcium Silicate Boards.C. Tsai, and H. Chen. Sensors, 20 (16): 4356 (2020)Novel Multi-view Synthesis from a Stereo Image Pair for 3D Display on Mobile Phone.C. Wei, C. Chiang, Y. Sun, M. Lin, and S. Lai. ACCV Workshops (2), volume 7729 of Lecture Notes in Computer Science, page 568-579. Springer, (2012)Detecting Multiclass Defects of Printed Circuit Boards in the Molded-interconnect-device Manufacturing Process Using Deep Object Detection Networks.C. Chang, H. Chen, and C. Lin. IEEM, page 1536-1540. IEEE, (2022)

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Disambiguation of "Chen, Wei-Hao"

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Improving FPGA Design with Monolithic 3D Integration Using High Dense Inter-Stack Via.

Please choose a person to relate this publication to

Hao Chen

Hao Chen

Hao Chen

Hao Chen

Wei Chen

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Chen, Wei-Hao"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Improving FPGA Design with Monolithic 3D Integration Using High Dense Inter-Stack Via.

Please choose a person to relate this publication to

Hao Chen

Hao Chen

Hao Chen

Hao Chen

Wei Chen

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
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URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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Improving FPGA Design with Monolithic 3D Integration Using High Dense Inter-Stack Via.