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Disambiguation of "Morioka, Ayuka"

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Nonvolatile logic-in-memory array processor in 90nm MTJ/MOS achieving 75% leakage reduction using cycle-based power gating.

, , , , , , , , , , , , , and . ISSCC, page 194-195. IEEE, (2013)

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Nobuyuki Morioka

 

Other publications of authors with the same name

NanoBridge-Based FPGA in High-Temperature Environments., , , , , , , , , and 7 other author(s). IEEE Micro, 37 (5): 32-42 (2017)A delay circuit with 4-terminal magnetic-random-access-memory device for power-efficient time- domain signal processing., , , , , , , , , and 5 other author(s). ISCAS, page 1588-1591. IEEE, (2014)10.5 A 90nm 20MHz fully nonvolatile microcontroller for standby-power-critical applications., , , , , , , , , and 4 other author(s). ISSCC, page 184-185. IEEE, (2014)Nonvolatile Logic-in-Memory LSI Using Cycle-Based Power Gating and its Application to Motion-Vector Prediction., , , , , , , , , and 4 other author(s). IEEE J. Solid State Circuits, 50 (2): 476-489 (2015)Nonvolatile logic-in-memory array processor in 90nm MTJ/MOS achieving 75% leakage reduction using cycle-based power gating., , , , , , , , , and 4 other author(s). ISSCC, page 194-195. IEEE, (2013)Architecture of Reconfigurable-Logic Cell Array with Atom Switch: Cluster Size & Routing Fabrics (Abstract Only)., , , , , , , , , and . FPGA, page 269. ACM, (2015)A 2× logic density Programmable Logic array using atom switch fully implemented with logic transistors at 40nm-node and beyond., , , , , , , , , and 2 other author(s). VLSI Circuits, page 1-2. IEEE, (2016)