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Contrast of a HDL model and COTS version of a microprocessor for soft-error testing., , , , , and . LATS, page 1-6. IEEE, (2017)On the modelling of SEU effects on spread spectrum wireless systems., , , , and . WiSEE, page 1-5. IEEE, (2014)A compiler-based infrastructure for fault-tolerant co-design., , , , , and . SCOPES, page 4. ACM, (2010)Coping With the Obsolescence of Safety- or Mission-Critical Embedded Systems Using FPGAs., , , , and . IEEE Trans. Ind. Electron., 58 (3): 814-821 (2011)Exploiting Fault Model Correlations to Accelerate SEU Sensitivity Assessment., , and . IEEE Trans. Ind. Informatics, 9 (1): 142-148 (2013)Two complementary approaches for studying the effects of SEUs on HDL-based designs., , , , and . IOLTS, page 220-221. IEEE, (2014)Implementation of a machine vision system for real-time traffic sign recognition on FPGA., , and . IECON, page 2285-2290. IEEE, (2013)A Flexible Selective Harmonic Mitigation Technique to Meet Grid Codes in Three-Level PWM Converters., , , , and . IEEE Trans. Ind. Electron., 54 (6): 3022-3029 (2007)Soft core based embedded systems in critical aerospace applications., , , , , and . J. Syst. Archit., 57 (10): 886-895 (2011)Selective Harmonic Mitigation Technique for Cascaded H-Bridge Converters With Nonequal DC Link Voltages., , , , , , and . IEEE Trans. Ind. Electron., 60 (5): 1963-1971 (2013)