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A Flexible SoC and Its Methodology for Parser-Based Applications.

, , , and . ACM Trans. Reconfigurable Technol. Syst., 10 (1): 4:1-4:23 (2016)

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Fast Converging ADMM-Penalized Algorithm for LDPC Decoding., , , , and . IEEE Communications Letters, 20 (4): 648-651 (2016)Multicore implementation of LDPC decoders based on ADMM algorithm., , , , and . ICASSP, page 971-975. IEEE, (2016)Low-latency software LDPC decoders for x86 multi-core devices., and . SiPS, page 1-6. IEEE, (2017)Software polar decoder on an embedded processor., , and . SiPS, page 180-185. IEEE, (2014)High data rate and flexible hardware QC-LDPC decoder for satellite optical communications., , , and . ISTC, page 1-5. IEEE, (2018)A Very High Throughput Deblocking Filter for H.264/AVC., , , and . J. Signal Process. Syst., 73 (2): 189-199 (2013)High-Throughput Multi-Core LDPC Decoders Based on x86 Processor., and . IEEE Trans. Parallel Distributed Syst., 27 (5): 1373-1386 (2016)Bit-Width Optimizations for High-Level Synthesis of Digital Signal Processing Systems., , and . SiPS, page 280-285. IEEE, (2006)High-level synthesis for the design of FPGA-based signal processing systems., and . ICSAMOS, page 25-32. IEEE, (2009)AFF3CT: A Fast Forward Error Correction Toolbox!, , , , , , , , , and 2 other author(s). SoftwareX, (2019)