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Thermal correlation between measurements and FEM simulations in 3D ICs., , , , , , , , , and 4 other author(s). 3DIC, page 1-6. IEEE, (2013)IntAct: A 96-Core Processor With Six Chiplets 3D-Stacked on an Active Interposer With Distributed Interconnects and Integrated Power Management., , , , , , , , , and 18 other author(s). IEEE J. Solid State Circuits, 56 (1): 79-97 (2021)Chip to wafer copper direct bonding electrical characterization and thermal cycling., , , , , , , , and . 3DIC, page 1-7. IEEE, (2013)Experimental Insights Into Thermal Dissipation in TSV-Based 3-D Integrated Circuits., , , , , , , , , and 6 other author(s). IEEE Des. Test, 33 (3): 21-36 (2016)Heat spreading packaging solutions for hybrid bonded 3D-ICs., , , , , , , , , and 2 other author(s). 3DIC, page 1-6. IEEE, (2016)Thermal performance of CoolCube™ monolithic and TSV-based 3D integration processes., , , , , , and . 3DIC, page 1-5. IEEE, (2016)Advances toward reliable high density Cu-Cu interconnects by Cu-SiO2 direct hybrid bonding., , , , , , , , , and . 3DIC, page 1-8. IEEE, (2014)Graphite-based heat spreaders for hotspot mitigation in 3D ICs., , , , , and . 3DIC, page TS10.4.1-TS10.4.4. IEEE, (2015)Using TSVs for thermal mitigation in 3D circuits: Wish and truth., , , , , , , , , and 1 other author(s). 3DIC, page 1-8. IEEE, (2014)3D integration demonstration of a wireless product with design partitioning., , , , , , , , , and 17 other author(s). 3DIC, page 1-5. IEEE, (2011)