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Disambiguation of "Afzali-Kusha, Ali"

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Block-Based Carry Speculative Approximate Adder for Energy-Efficient Applications.

, , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 67-II (1): 137-141 (2020)

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Dariush Afzali

Wien Kusharyoto

Jörg Kushauer

ali

Ali Aassie Ali

 

Other publications of authors with the same name

Low Power Combinational Multipliers using Data-driven Signal Gating., and . APCCAS, page 1430-1433. IEEE, (2006)An Efficient Clocking Scheme for On-Chip Communications., , , and . APCCAS, page 119-122. IEEE, (2006)WL-VC SRAM: a low leakage memory circuit for deep sub-micron design., , and . ISCAS, IEEE, (2006)High performance circuit techniques for dynamic OR gates., , and . ISCAS, IEEE, (2006)Systematic test program generation for SoC testing using embedded processor., , , and . ISCAS (5), page 541-544. IEEE, (2003)Simultaneous Reduction of Dynamic and Static Power in Scan Structures, , , , and . CoRR, (2007)A Theoretical Framework for Quality Estimation and Optimization of DSP Applications Using Low-Power Approximate Adders., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 66-I (1): 327-340 (2019)Scan-Based Structure with Reduced Static and Dynamic Power Consumption., , , , and . J. Low Power Electron., 2 (3): 477-487 (2006)OPLE: A Heuristic Custom Instruction Selection Algorithm Based on Partitioning and Local Exploration of Application Dataflow Graphs., , , and . ACM Trans. Embed. Comput. Syst., 14 (4): 72:1-72:23 (2015)All-Region Statistical Model for Delay Variation Based on Log-Skew-Normal Distribution., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 35 (9): 1503-1508 (2016)