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A 0.1pJ/b 5-to-10Gb/s charge-recycling stacked low-power I/O for on-chip signaling in 45nm CMOS SOI.

, , , , , , , и . ISSCC, стр. 400-401. IEEE, (2013)

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Shuo-Chun Hsieh

Ju-Lan Hsieh

Shelley Ching-yu Hsieh

Ping-Ping Tsai

Chih-sheng Hsieh

 

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