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Disambiguation of "Sakurai, Takayasu"

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Intermittent Resonant Clocking Enabling Power Reduction at Any Clock Frequency for Near/Sub-Threshold Logic Circuits.

, , , and . IEEE J. Solid State Circuits, 49 (2): 536-544 (2014)

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Yoriko Sakurai

Kaneaki Sakurai

Miriam Takayasu

Takayasu Shimizu

 

Other publications of authors with the same name

A 95mV-startup step-up converter with Vth-tuned oscillator by fixed-charge programming and capacitor pass-on scheme., , , , , , , , and . ISSCC, page 216-218. IEEE, (2011)A 80-mV input, fast startup dual-mode boost converter with charge-pumped pulse generator for energy harvesting., , , , , , and . A-SSCC, page 33-36. IEEE, (2011)Meeting with the forthcoming IC design.. SBCCI, page 2. ACM, (2007)Coupling-Driven Bus Design for Low-Power Application-Specific Systems., and . DAC, page 750-753. ACM, (2001)Variable threshold CMOS (VTCMOS) in series connected circuits., , and . ISLPED, page 201-206. ACM, (2001)Estimation of power distribution in VLSI interconnects., and . ISLPED, page 370-375. ACM, (2001)Silicon 3D-integration technology and systems., , , , , , , , , and . ISSCC, page 510-511. IEEE, (2010)Reducing IR drop in 3D integration to less than 1/4 using Buck Converter on Top die (BCT) scheme., , , , , , , and . ISQED, page 210-215. IEEE, (2013)A 1.8V 30nJ adaptive program-voltage (20V) generator for 3D-integrated NAND flash SSD., , , , , , and . ISSCC, page 238-239. IEEE, (2009)A 2Gb/s 15pJ/b/chip Inductive-Coupling programmable bus for NAND Flash memory stacking., , , , , , , and . ISSCC, page 244-245. IEEE, (2009)