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Disambiguation of "Kwon, Hye-Jung"

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23.4 An extremely low-standby-power 3.733Gb/s/pin 2Gb LPDDR4 SDRAM for wearable devices.

, , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , and . ISSCC, page 394-395. IEEE, (2017)

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Hye Young Jung

Hye-Jung Kim

Hye-Jung Lee

Hye-Jung Kim

Joseph Meinrad Hyera

 

Other publications of authors with the same name

A 16-Gb, 18-Gb/s/pin GDDR6 DRAM With Per-Bit Trainable Single-Ended DFE and PLL-Less Clocking., , , , , , , , , and 29 other author(s). IEEE J. Solid State Circuits, 54 (1): 197-209 (2019)A Duo-Binary Transceiver With Time-Based Receiver and Voltage-Mode Time-Interleaved Mixing Transmitter for DRAM Interface., , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 68 (7): 2409-2413 (2021)The Double Meaning of Online Social Space: Three-Way Interactions Among Social Anxiety, Online Social Behavior, and Offline Social Behavior., , , and . Cyberpsy., Behavior, and Soc. Networking, 18 (9): 514-520 (2015)A 16Gb 18Gb/S/pin GDDR6 DRAM with per-bit trainable single-ended DFE and PLL-less clocking., , , , , , , , , and 39 other author(s). ISSCC, page 204-206. IEEE, (2018)Analysis of an Open-Loop Time Amplifier With a Time Gain Determined by the Ratio of Bias Current., , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 61-II (7): 481-485 (2014)23.4 An extremely low-standby-power 3.733Gb/s/pin 2Gb LPDDR4 SDRAM for wearable devices., , , , , , , , , and 26 other author(s). ISSCC, page 394-395. IEEE, (2017)A high-gain wide-input-range time amplifier with an open-loop architecture and a gain equal to current bias ratio., , , and . A-SSCC, page 325-328. IEEE, (2011)A 16-Gb T-Coil-Based GDDR6 DRAM With Merged-MUX TX, Optimized WCK Operation, and Alternative-Data-Bus Achieving 27-Gb/s/Pin in NRZ., , , , , , , , , and 24 other author(s). IEEE J. Solid State Circuits, 58 (1): 279-290 (2023)A 0.4 V driving multi-touch capacitive sensor with the driving signal frequency set to (n+0.5) times the inverse of the LCD VCOM noise period., , , , , , and . ISCAS, page 682-685. IEEE, (2014)A 16Gb 27Gb/s/pin T-coil based GDDR6 DRAM with Merged-MUX TX, Optimized WCK Operation, and Alternative-Data-Bus., , , , , , , , , and 24 other author(s). ISSCC, page 446-448. IEEE, (2022)