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Preferred Fill: A Scalable Method to Reduce Capture Power for Scan Based Designs.

S. Remersaro, X. Lin, Z. Zhang, S. Reddy, I. Pomeranz, and J. Rajski. ITC, page 1-10. IEEE Computer Society, (2006)

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Janusz Gatniejewski

Janusz Panzer

Janusz Rat

Janusz Surzykiewicz

Janusz Bogdanowicz

Other publications of authors with the same name

On Linear Dependencies in Subspaces of LFSR-Generated Sequences.J. Rajski, and J. Tyszer. IEEE Trans. Computers, 45 (10): 1212-1216 (1996)Built-In Self-Test for Systems on Silicon.J. Rajski, J. Tyszer, and S. Patel. VLSI Design, page 609-610. IEEE Computer Society, (1999)High Performance Dense Ring Generators.G. Mrugalski, N. Mukherjee, J. Rajski, and J. Tyszer. IEEE Trans. Computers, 55 (1): 83-87 (2006)Embedded deterministic test points for compact cell-aware tests.C. Acero, D. Feltham, F. Hapke, E. Moghaddam, N. Mukherjee, V. Neerkundar, M. Patyra, J. Rajski, J. Tyszer, and J. Zawada. ITC, page 1-8. IEEE, (2015)Self-test methodology for at-speed test of crosstalk in chip interconnects.X. Bai, S. Dey, and J. Rajski. DAC, page 619-624. ACM, (2000)On Using Implied Values in EDT-based Test Compression.M. Gebala, G. Mrugalski, N. Mukherjee, J. Rajski, and J. Tyszer. DAC, page 11:1-11:6. ACM, (2014)EDT Bandwidth Management in SoC Designs.J. Janicki, M. Kassab, G. Mrugalski, N. Mukherjee, J. Rajski, and J. Tyszer. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 31 (12): 1894-1907 (2012)Embedded deterministic test.J. Rajski, J. Tyszer, M. Kassab, and N. Mukherjee. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 23 (5): 776-792 (2004)Hardware Protection via Logic Locking Test Points.M. Chen, E. Moghaddam, N. Mukherjee, J. Rajski, J. Tyszer, and J. Zawada. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 37 (12): 3020-3030 (2018)Ring generators - new devices for embedded test applications.G. Mrugalski, J. Rajski, and J. Tyszer. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 23 (9): 1306-1320 (2004)

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Disambiguation of "Rajski, Janusz"

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Preferred Fill: A Scalable Method to Reduce Capture Power for Scan Based Designs.

Please choose a person to relate this publication to

Janusz Gatniejewski

Janusz Panzer

Janusz Rat

Janusz Surzykiewicz

Janusz Bogdanowicz

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Rajski, Janusz"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Preferred Fill: A Scalable Method to Reduce Capture Power for Scan Based Designs.

Please choose a person to relate this publication to

Janusz Gatniejewski

Janusz Panzer

Janusz Rat

Janusz Surzykiewicz

Janusz Bogdanowicz

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Preferred Fill: A Scalable Method to Reduce Capture Power for Scan Based Designs.