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Key Reconciliation Protocols for Error Correction of Silicon PUF Responses.

, , , and . IACR Cryptology ePrint Archive, (2016)

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A new orthogonal online digital calibration for time-interleaved analog-to-digital converters., , , , and . ISCAS, page 576-579. IEEE, (2008)Key Reconciliation Protocols for Error Correction of Silicon PUF Responses., , , and . IACR Cryptology ePrint Archive, (2016)Enhanced TERO-PUF Implementations and Characterization on FPGAs (Abstract Only)., , and . FPGA, page 282. ACM, (2016)Reducing and smoothing power consumption of ROM-based controller implementations., , , and . SBCCI, page 8-13. ACM, (2010)Electromagnetic Transmission of Intellectual Property Data to Protect FPGA Designs., , and . VLSI-SoC (Selected Papers), volume 483 of IFIP Advances in Information and Communication Technology, page 150-169. Springer, (2015)A comprehensive hardware/software infrastructure for IP cores design protection., , , and . FPT, page 263-266. IEEE, (2017)Methodology for Efficient CNN Architectures in Profiling Attacks., , , and . IACR Trans. Cryptogr. Hardw. Embed. Syst., 2020 (1): 1-36 (2020)Fast Design Space Exploration Method for Reconfigurable Architectures., , and . Engineering of Reconfigurable Systems and Algorithms, page 65-71. CSREA Press, (2003)Message-recovery Laser Fault Injection Attack on Code-based Cryptosystems., , , , and . IACR Cryptol. ePrint Arch., (2020)An Ultra-Lightweight Transmitter for Contactless Rapid Identification of Embedded IP in FPGA., , and . IEEE Embed. Syst. Lett., 7 (4): 97-100 (2015)