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Disambiguation of "Giraud, Bastien"

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An Innovative 6T Hybrid SRAM Cell in sub-32 nm Double-Gate MOS Technology.

, , and . DELTA, page 241-244. IEEE Computer Society, (2010)

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Volker Giraud

Reinhard Giraud

Bastien Pietropaoli

Bastien Clausse

Xavier Giraud

 

Other publications of authors with the same name

Binary Linear ECCs Optimized for Bit Inversion in Memories with Asymmetric Error Probabilities., , and . DATE, page 298-301. IEEE, (2020)Storage Class Memory with Computing Row Buffer: A Design Space Exploration., , , , , , , , , and . DATE, page 1-6. IEEE, (2021)Benefits of Design Assist Techniques on Performances and Reliability of a RRAM Macro., , , , , , , , , and 9 other author(s). IMW, page 1-4. IEEE, (2023)Smart instruction codes for in-memory computing architectures compatible with standard SRAM interfaces., , , , and . DATE, page 1634-1639. IEEE, (2018)Ultra-wide voltage range designs in fully-depleted silicon-on-insulator FETs., , , , , , , , , and 10 other author(s). DATE, page 613-618. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Capacitor based SneakPath compensation circuit for transistor-less ReRAM architectures., , , , and . NANOARCH, page 7-12. ACM, (2016)High density emerging resistive memories: What are the limits?, , , , and . LASCAS, page 1-4. IEEE, (2017)A Comparative Study of 6T and 4T SRAM Cells in Double-Gate CMOS with Statistical Variation., , and . ISCAS, page 3022-3025. IEEE, (2007)Low Standby Power Capacitively Coupled Sense Amplifier for wide voltage range operation of dual rail SRAMs., , , , , , , , and . ICICDT, page 1-4. IEEE, (2015)Ultra-wide body-bias range LDPC decoder in 28nm UTBB FDSOI technology., , , , , , , , , and 4 other author(s). ISSCC, page 424-425. IEEE, (2013)