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Tag-In-Tag: Efficient flow table management in SDN switches.

, and . CNSM, page 109-117. IEEE Computer Society, (2014)

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FlowMaster: Early Eviction of Dead Flow on SDN Switches., and . ICDCN, volume 8314 of Lecture Notes in Computer Science, page 484-498. Springer, (2014)The interaction of last-level-cache mechanisms on modern processors., , and . MEMSYS, page 249-250. ACM, (2017)Program Phase Directed Dynamic Cache Way Reconfiguration for Power Efficiency., , and . ASP-DAC, page 884-889. IEEE Computer Society, (2007)Tag-In-Tag: Efficient flow table management in SDN switches., and . CNSM, page 109-117. IEEE Computer Society, (2014)On the applicability of simple cache models for modern processors., , and . ICGHPC, page 1-7. IEEE, (2016)Instruction Reuse in SPEC, media and packet processing benchmarks: A comparative study of power, performance and related microarchitectural optimizations., , and . J. Embed. Comput., 2 (1): 15-34 (2006)On the Effectiveness of Flow Aggregation in Improving Instruction Reuse in Network Processing Applications., , and . Int. J. Parallel Program., 31 (6): 469-487 (2003)On the effectiveness of phase based regression models to trade power and performance using dynamic processor adaptation., , and . J. Syst. Archit., 54 (8): 797-815 (2008)Power-performance trade-off using pipeline delays., , and . ASP-DAC, page 384-386. IEEE Computer Society, (2004)On the effectiveness of prefetching and reuse in reducing L1 data cache traffic: a case study of Snort., , and . WMPI, page 88-95. ACM, (2004)