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Leveraging irrevocability to deal with signature saturation in hardware transactional memory.

, , , and . J. Supercomput., 73 (6): 2525-2557 (2017)

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Parallelization Strategies for the VMEC Program., , , and . PARA, volume 1541 of Lecture Notes in Computer Science, page 483-490. Springer, (1998)Unified Locality-Sensitive Signatures for Transactional Memory., , , and . Euro-Par (1), volume 6852 of Lecture Notes in Computer Science, page 326-337. Springer, (2011)On Automatic Parallelization of Irregular Reductions on Scalable Shared Memory Systems., , and . Euro-Par, volume 1685 of Lecture Notes in Computer Science, page 422-429. Springer, (1999)Parallel algorithm for principal components based on Hotelling's iterative procedure., , and . PDP, page 144-149. IEEE, (1993)Enhancing the Parallelization of Sparse Matrices through Dynamic Issues., , and . PDPTA, page 1451-1457. CSREA Press, (1999)Error Analysis and Reduction for Angle Calculation Using the CORDIC Algorithm., , , and . IEEE Trans. Computers, 46 (11): 1264-1271 (1997)LS-Sig: Locality-Sensitive Signatures for Transactional Memory., , , and . IEEE Trans. Computers, 62 (2): 322-335 (2013)CORDIC Processor for Variable-Precision Interval Arithmetic., , and . VLSI Signal Processing, 37 (1): 21-39 (2004)Vienna-Fortran/HPF Extensions for Sparse and Irregular Problems and Their Compilation., , , and . IEEE Trans. Parallel Distributed Syst., 8 (10): 1068-1083 (1997)Hardware Signature Designs to Deal with Asymmetry in Transactional Data Sets., , , and . IEEE Trans. Parallel Distributed Syst., 24 (3): 506-519 (2013)