( en | de | ru )

 

Disambiguation of "Shin, Abe"

Author of the publication

copydeleteadd this publication to your clipboard
The Mediating Role of Interaction in the Relationship between Engagement and Satisfaction in Synchronous Virtual Environments among Korean Students

. International Journal of Recent Innovations in Academic Research, 8 (1): 86-97 (January 2024)
DOI: https://doi.org/10.5281/zenodo.10648670

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Christoph Abé

Eva Abe

Ilse Abé

Richard Abé

Dong-Shin Shin

 

Other publications of authors with the same name

Designing and Developing Multilingual E-Learning Materials: TUFS Language Education Pronunciation Module - Introduction of a System for Learning Japanese Language Pronunciation., , , and . ICALT, page 462. IEEE Computer Society, (2003)The Mediating Role of Interaction in the Relationship between Engagement and Satisfaction in Synchronous Virtual Environments among Korean Students. International Journal of Recent Innovations in Academic Research, 8 (1): 86-97 (January 2024)A floorplan-aware high-level synthesis algorithm for multiplexer reduction targeting FPGA designs., , , , and . APCCAS, page 244-247. IEEE, (2014)Negative and Positive Muon-Induced SEU Cross Sections in 28-nm and 65-nm Planar Bulk CMOS SRAMs., , , , , , , , , and . IRPS, page 1-5. IEEE, (2019)Energy-efficient High-level Synthesis for HDR Architectures., , and . Inf. Media Technol., 7 (4): 1319-1330 (2012)Characterizing SEU Cross Sections of 12- and 28-nm SRAMs for 6.0, 8.0, and 14.8 MeV Neutrons., , , , , , and . IRPS, page 1-6. IEEE, (2023)Energy-efficient High-level Synthesis for HDR Architectures with Clock Gating Based on Concurrency-oriented Scheduling., , , and . Inf. Media Technol., 8 (4): 913-923 (2013)Energy-efficient High-level Synthesis for HDR Architecture with Multi-stage Clock Gating., , , and . Inf. Media Technol., 10 (1): 1-7 (2015)Critical charge dependence of correlation of different neutron sources for soft error testing., , , , and . IRPS, page 2. IEEE, (2015)An energy-efficient high-level synthesis algorithm incorporating interconnection delays and dynamic multiple supply voltages., , , , and . VLSI-DAT, page 1-4. IEEE, (2013)