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Disambiguation of "Petranovic, Dusan"

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Simple and Accurate Models for Capacitance Increment due to Metal Fill Insertion.

, , and . ASP-DAC, page 456-461. IEEE Computer Society, (2007)

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Dusan Dobias

Helena Dusanek

Dusan Baciak

Dusan Hanidziar

Dusan Sovilj

 

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Silicon Effect-Aware Full-Chip Extraction and Mitigation of TSV-to-TSV Coupling., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 33 (12): 1900-1913 (2014)Including inductance in static timing analysis., , and . ICCAD, page 686-691. IEEE Computer Society, (2007)Coupling Extraction and Optimization for Heterogeneous 2.5D Chiplet-Package Co-Design., , and . ICCAD, page 3:1-3:8. IEEE, (2020)Robust verification of 3D-ICs: Pros, cons and recommendations., and . 3DIC, page 1-6. IEEE, (2009)Full-chip Inter-die Parasitic Extraction in Face-to-Face-Bonded 3D ICs., , , and . ICCAD, page 649-655. IEEE, (2015)Cross-Boundary Inductive Timing Optimization for 2.5D Chiplet-Package Co-Design., , and . ACM Great Lakes Symposium on VLSI, page 135-140. ACM, (2021)MetaCores: Design and Optimization Techniques., , , , and . DAC, page 585-590. ACM, (2001)Resistance Matrix in Crosstalk Modeling for Muliconductor Systems., , , , and . ISQED, page 122-125. IEEE Computer Society, (2004)Fast and Accurate Full-chip Extraction and Optimization of TSV-to-Wire Coupling., , and . DAC, page 28:1-28:6. ACM, (2014)Simple and Accurate Models for Capacitance Considering Floating Metal Fill Insertion., , and . IEEE Trans. Very Large Scale Integr. Syst., 17 (8): 1166-1170 (2009)